LLVM-SIZE(1)                     User Commands                    LLVM-SIZE(1)

       llvm-size - manual page for llvm-size 3.5

       OVERVIEW: llvm object size dumper

       USAGE: llvm-size [options] <input files>

       --radix=<uint>                                   - Print size in radix.
              Only 8, 10, and 16 are valid

              Specify output format

       -A                                            - System V format

       -B                                            - Berkeley format

       -m                                            - Darwin -m format

       -aarch64-neon-syntax                            - Choose style of  NEON
              code to emit from AArch64 backend:

              -   Emit generic NEON assembly

       =apple -   Emit Apple-style NEON assembly

       -arch=<string>                                   - architecture(s) from
              a Mach-O file to dump

       -bounds-checking-single-trap                    - Use  one  trap  block
              per function

       -cppfname=<function  name>                        - Specify the name of
              the generated function

       -cppfor=<string>                                - Specify the  name  of
              the thing to generate

       -cppgen                                          -  Choose what kind of
              output to generate

              -   Generate a complete program

              -   Generate a module definition

              -   Generate contents of a module

              -   Generate a function definition

              -   Generate all function definitions

              -   Generate an inline function

              -   Generate a variable definition

       =type  -   Generate a type definition

              Print size in radix:

       -o                                            - Print size in octal

       -d                                            - Print size in decimal

       -x                                            - Print size in hexadeci-

       -disable-spill-fusing                            -  Disable  fusing  of
              spill code into instructions

       -enable-load-pre                                -

       -enable-misched                                 -  Enable  the  machine
              instruction scheduling pass.

       -enable-objc-arc-opts                            -  enable/disable  all
              ARC Optimizations

       -enable-tbaa                                    -

       -exhaustive-register-search                     - Exhaustive Search for
              registers  bypassing  the depth and interference cutoffs of last
              chance recoloring

       -fatal-assembler-warnings                       - Consider warnings  as

       -format                                         - Specify output format

       =sysv  -   System V format

              -   Berkeley format

              -   Darwin -m format

       -help                                             -  Display  available
              options (-help-hidden for more)

       -internalize-public-api-file=<filename>          -  A  file  containing
              list of symbol names to preserve

       -internalize-public-api-list=<list>              -  A  list  of  symbol
              names to preserve

       -join-liveintervals                               -   Coalesce   copies

       -l                                               -  When format is dar-
              win, use long format to include addresses and offsets.

       -limit-float-precision=<uint>                   -  Generate  low-preci-
              sion inline sequences for some float libcalls

       -mc-x86-disable-arith-relaxation                - Disable relaxation of
              arithmetic instruction for X86

       -mips16-constant-islands                        - MIPS: mips16 constant
              islands enable.

       -mips16-hard-float                               -  MIPS:  mips16  hard
              float enable.

       -mlsm                                            -  Enable  motion   of
              merged load and store

       -mno-ldc1-sdc1                                   - Expand double preci-
              sion loads and stores to their single precision counterparts

       -no-discriminators                              - Disable generation of
              discriminator information.

       -nvptx-sched4reg                                  -   NVPTX   Specific:
              schedule for register pressue

       -print-after-all                                - Print IR  after  each

       -print-before-all                                - Print IR before each

       -print-machineinstrs=<pass-name>                - Print machine instrs

       -regalloc                                       - Register allocator to

              -   pick register allocator based on -O option

       =basic -   basic register allocator

       =fast  -   fast register allocator

              -   greedy register allocator

       =pbqp  -   PBQP register allocator

       -rng-seed=<seed>                                 -  Seed for the random
              number generator

       -sample-profile-max-propagate-iterations=<uint>  -  Maximum  number  of
              iterations  to  go  through  when  propagating sample block/edge
              weights through the CFG.

       -spiller                                         -  Spiller   to   use:
              (default: standard)

              -   trivial spiller

              -   inline spiller

       -stackmap-version=<int>                          - Specify the stackmap
              encoding version (default = 1)

       -stats                                           -  Enable   statistics
              output from program (available with Asserts)

       -time-passes                                      -   Time  each  pass,
              printing elapsed time for each on exit

       -verify-debug-info                              -

       -verify-dom-info                                - Verify dominator info
              (time consuming)

       -verify-loop-info                                 -  Verify  loop  info
              (time consuming)

       -verify-regalloc                                - Verify during  regis-
              ter allocation

       -verify-region-info                              -  Verify  region info
              (time consuming)

       -verify-scev                                    -  Verify  ScalarEvolu-
              tion's backedge taken counts (slow)

       -version                                         -  Display the version
              of this program

       -x86-asm-syntax                                 - Choose style of  code
              to emit from X86 backend:

       =att   -   Emit AT&T-style assembly

       =intel -   Emit Intel-style assembly

       The full documentation for llvm-size is maintained as a Texinfo manual.
       If the info and llvm-size programs are properly installed at your site,
       the command

              info llvm-size

       should give you access to the complete manual.

llvm-size 3.5                    October 2016                     LLVM-SIZE(1)

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